>>21017335You have to translate the model code into something that can run on accelerator hardware.
>I think he said his stuff is open sores, so I’m really thinking operating systems.I bet it's hardware kernel drivers then. He was talking about some fairly low level hardware stuff earlier.
Anyway, I have an idea for a specialized deep learning ASIC, that if combined with a new model architecture that I've been working on, could run 6-9 orders of magnitude faster/more efficiently than the current practice in deep learning. I'm higher in the technology stack though, more towards the actual model design. An /smg/ startup would be based.