[3 / 1 / ?]
Quoted By: >>902101
1)the immediate hexadecimal operand 0x1111 found in MIPS I-type instruction will be sign extended to produce the 64 bit constant written in base 16 0x1111 1111 1111 1111 [T/F]
2)The bit patterns corresponding to the sign-magnitude, 2's complement, and unsigned binary representation of an integer x > 0 are identical. [T/F]
3)All MIPS instructions that write to memory use the displacement addressing mode[T/F]
4)The instruction LW R6, 16(R0) is invalid for (0,3) GPR because it references memory and has fewer than 3 operands [T/F]
5)can underflow occur for integer ALU instructions, if so, give an example
2)The bit patterns corresponding to the sign-magnitude, 2's complement, and unsigned binary representation of an integer x > 0 are identical. [T/F]
3)All MIPS instructions that write to memory use the displacement addressing mode[T/F]
4)The instruction LW R6, 16(R0) is invalid for (0,3) GPR because it references memory and has fewer than 3 operands [T/F]
5)can underflow occur for integer ALU instructions, if so, give an example
